[PATCH] D124192: [AMDGPU] Callee must always spill writelane VGPRs

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp:267
+  // Skip if it is an entry function or the register is already added.
+  if (isEntryFunction() || WWMVGPRs.count(VGPR))
+    return;
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I don't understand why you would encounter the same register twice. This should assert the insert is a new insert?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D124192/new/

https://reviews.llvm.org/D124192