[PATCH] D128188: [RISCV] Add a scavenge spill slot when use ADDI to compute scalable stack offset

[luxufan via Phabricator via llvm-commits]

StephenFan updated this revision to Diff 440113.
StephenFan added a comment.

1. Early return if GlobalMostScavSlotsNum reaches the GlobalMostScavSlotsNumKnown
2. Remove LocalMostScavSlotsNum


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D128188/new/

https://reviews.llvm.org/D128188

Files:
  llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
  llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
  llvm/lib/Target/RISCV/RISCVInstrInfo.h
  llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
  llvm/test/CodeGen/RISCV/rvv/addi-rvv-stack-object.mir
  llvm/test/CodeGen/RISCV/rvv/rvv-stack-align.mir
  llvm/test/CodeGen/RISCV/rvv/scalar-stack-align.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D128188.440113.patch
Type: text/x-patch
Size: 11692 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20220627/e114f5e6/attachment.bin>