[PATCH] D128435: [AMDGPU] Fix assertion failure on mad with negative immediate addend

[Jay Foad via Phabricator via llvm-commits]

foad added a reviewer: AMDGPU.
foad added a comment.

The problem was introduced by D127253 <https://reviews.llvm.org/D127253>. I'm not sure what the best fix is.

Since v_mad_u64_u32 is an unsigned instruction, the hardware will zero-extend a 32-bit literal operand to 64 bits, so perhaps this pattern added by D127253 <https://reviews.llvm.org/D127253> should not be using as_i64imm (which sign extends):

  def : GCNPat <
        (ThreeOpFragSDAG<mul, add> i32:$src0, i32:$src1, (i32 imm:$src2)),
        (EXTRACT_SUBREG (inst $src0, $src1, (i64 (as_i64imm $src2)), 0 /* clamp */), sub0)
        >;

On the other hand, the assert in printImmediate64 does not make much sense to me so I am happy to remove it.



================
Comment at: llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp:545
+  else
+    O << formatHex(Imm);
 }
----------------
Perhaps I should truncate Imm to 32 bits here. I'm not sure.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D128435/new/

https://reviews.llvm.org/D128435