[PATCH] D126771: [fastalloc] Support allocate specific register class in fastalloc.

Christudasan Devadasan via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jun 22 00:56:40 PDT 2022


cdevadas added inline comments.


================
Comment at: llvm/test/CodeGen/AMDGPU/indirect-addressing-term.ll:43
+  ; GCN-NEXT:   renamable $sgpr15 = S_MOV_B32 0
+  ; GCN-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32 = COPY killed renamable $sgpr15
+  ; GCN-NEXT:   [[COPY2:%[0-9]+]]:vgpr_32 = COPY killed renamable $sgpr14
----------------
LuoYuanke wrote:
> Some register class is not allocated in the first fast RA pass.
That's right. VGPRs during the 2nd RA pass.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D126771/new/

https://reviews.llvm.org/D126771



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