[PATCH] D126771: [fastalloc] Support allocate specific register class in fastalloc.

[Christudasan Devadasan via Phabricator via llvm-commits]

cdevadas added inline comments.


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Comment at: llvm/test/CodeGen/AMDGPU/collapse-endcf.ll:425
 ; GCN-O0: [[INNER_LOOP:.LBB[0-9]+_[0-9]+]]:
+; GCN-O0: buffer_load_dword
 ; GCN-O0-DAG:  v_readlane_b32 s{{[0-9]+}}, [[VGPR]], [[INNER_LOOP_BACK_EDGE_EXEC_SPILL_LANE_0]]
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LuoYuanke wrote:
> This is caused by 2 RA pass. Previous allocating specific register class doesn't work in fast RA.
Yes, this is the right thing. The buffer_load_dword (the VGPR spill) should appear at the block prolog as they are inserted during 2 RA pass. In the left-hand side they are incorrectly inserted during the 1 RA pass which is supposed to allocate only SGPRs. 


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D126771/new/

https://reviews.llvm.org/D126771