[PATCH] D126201: [WIP] Very early work to enable isel of fixed length vector extracts from scalable vectors.

[Allen zhong via Phabricator via llvm-commits]

Allen added inline comments.


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Comment at: llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td:1425
 
+  // Extract fixed length subvector from FP SVE vectors
+  def : Pat<(v2f32 (extract_subvector2 (nxv2f32 ZPR:$Zs), (i64 0))),
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paulwalker-arm wrote:
> Allen wrote:
> > hi, @paulwalker-arm:
> >    do you still working on it, may be it need more pattern to match above commented pattten?
> I've not done anything since this initial version.  Especially since concluding we can probably use `vector_extract_subvec`.  I can pick this up if you want.  I'm kind of interested anyway as a way to remove the original support code from AArch64ISelDAGToDAG.cpp.
That would be perfect. Thank you so much.


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  https://reviews.llvm.org/D126201/new/

https://reviews.llvm.org/D126201