[PATCH] D128106: [PowerPC] Add support for G_ADD and G_SUB.

[Kai Nacke via Phabricator via llvm-commits]

Kai marked an inline comment as done.
Kai added inline comments.


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Comment at: llvm/test/CodeGen/PowerPC/GlobalISel/ppc-irtranslator.ll:42-43
+; CHECK-NEXT:  BLR8 implicit $lr8, implicit $rm, implicit $x3
+define i64 @addi64(i64 %a, i64 %b) {
+  %res = add i64 %a, %b
+  ret i64 %res
----------------
arsenm wrote:
> Checking these in an IRTranslator test is pointless
Removed tests.


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Comment at: llvm/test/CodeGen/PowerPC/GlobalISel/ppc-isel-arithmentic.ll:10
+}
+
+; CHECK-LABEL: test_sub:
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arsenm wrote:
> Probably should also test some illegal types and vectors
Added tests for i8, i16, i32.
Vectors are not yet supported, the base code in [[ https://reviews.llvm.org/D127530 | D127530 ]] does not even have a register bank for vector res.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D128106/new/

https://reviews.llvm.org/D128106