[PATCH] D121833: [SelectionDAG][RISCV][AMDGPU][ARM] Improve SimplifyDemandedBits for SHL with variable shift amount.

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added a subscriber: foad.
RKSimon added a comment.
Herald added subscribers: kosarev, sunshaoce, StephenFan, shiva0217.

In D121833#3387866 <https://reviews.llvm.org/D121833#3387866>, @arsenm wrote:

> Seems like it should get a dedicated test to stress the edge cases

SGTM - @foad do you have any particular concerns or tests you'd expect?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D121833/new/

https://reviews.llvm.org/D121833