[PATCH] D125836: [DAG] Fold (srl (shl x, c1), c2) -> and(shl/srl(x, c3), m)

Simon Pilgrim via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Jun 17 08:18:51 PDT 2022


RKSimon updated this revision to Diff 437916.
RKSimon retitled this revision from "[DAG] Fold (srl (shl x, c1), c2) -> and(shl/srl(x, c3), m) (WIP)" to "[DAG] Fold (srl (shl x, c1), c2) -> and(shl/srl(x, c3), m)".
RKSimon edited the summary of this revision.
RKSimon added a comment.

Extend AArch64TargetLowering::shouldFoldConstantShiftPairToMask so that we don't lose the srl(shl(x,c1),c2) pair if it would likely break a UBFX pattern.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D125836/new/

https://reviews.llvm.org/D125836

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/test/CodeGen/AArch64/ushl_sat.ll
  llvm/test/CodeGen/AMDGPU/idot8s.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ubfe.ll
  llvm/test/CodeGen/ARM/umulo-32.ll
  llvm/test/CodeGen/X86/pr32588.ll
  llvm/test/CodeGen/X86/pull-binop-through-shift.ll
  llvm/test/CodeGen/X86/rotate-extract-vector.ll
  llvm/test/CodeGen/X86/rotate-extract.ll
  llvm/test/CodeGen/X86/shift-mask.ll

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