[PATCH] D127983: [RISCV] Start merging demanded reasoning - starting with load/stores [nfc]
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 16 14:08:50 PDT 2022
craig.topper accepted this revision.
craig.topper added a comment.
This revision is now accepted and ready to land.
LGTM
================
Comment at: llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp:346
if (MI.isCall() || MI.isInlineAsm() || MI.readsRegister(RISCV::VTYPE)) {
Res.SEW = true;
Res.LMUL = true;
----------------
Maybe a helper method in DemandedFields to set all VTYPE related fields could make sense here?
================
Comment at: llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp:360
+ Res.MaskPolicy = true;
+ if (RISCVII::hasVLOp(TSFlags)) {
+ Res.VL = true;
----------------
nit: You can drop the curly braces here
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D127983/new/
https://reviews.llvm.org/D127983
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