[PATCH] D127996: [RISCV] Delete dead elideCopy code in InsertVSETVLI [nfc]
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 16 12:24:32 PDT 2022
craig.topper added a comment.
Looking at this more, this code may only be dead because we don't do the tied operand check if a policy operand is present. That's probably true for a significant number of instructions these days.
Ignoring that and looking at what the MIR looks like at the time we reach InsertVSETVLI for this test case
define <vscale x 8 x i64> @vpload_nxv8i64(<vscale x 8 x i64>* %ptr, <vscale x 8 x i1> %m, i32 zeroext %evl) #1 {
%load = call <vscale x 8 x i64> @llvm.vp.load.nxv8i64.p0nxv8i64(<vscale x 8 x i64>* %ptr, <vscale x 8 x i1> %m, i32 %evl)
ret <vscale x 8 x i64> %load
}
I see
# Machine code for function vpload_nxv8i64: IsSSA, TracksLiveness
Function Live Ins: $x10 in %0, $v0 in %1, $x11 in %2
bb.0 (%ir-block.0):
liveins: $x10, $v0, $x11
%2:gprnox0 = COPY $x11
%1:vr = COPY $v0
%0:gpr = COPY $x10
$v0 = COPY %1:vr
%4:vrm8 = IMPLICIT_DEF
%5:vrm8nov0 = COPY %4:vrm8
%3:vrm8nov0 = PseudoVLE64_V_M8_MASK %5:vrm8nov0(tied-def 0), %0:gpr, $v0, %2:gprnox0, 6, 1 :: (load unknown-size from %ir.ptr, align 64)
$v8m8 = COPY %3:vrm8nov0
PseudoRET implicit $v8m8
# End machine code for function vpload_nxv8i64.
That shows an IMPLICIT_DEF behind a copy instruction. I think it is related to vrm8nov0 having 3 registers. It doesn't happen on an LMUL=4 test. I suspect it hit the MinRCSize limit of 4 in InstrEmitter::AddRegisterOperand.
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https://reviews.llvm.org/D127996/new/
https://reviews.llvm.org/D127996
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