[PATCH] D127848: [CodeGen] Fix the bug of machine sink

ChenZheng via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jun 15 08:49:38 PDT 2022


shchenz added inline comments.


================
Comment at: llvm/lib/CodeGen/MachineSink.cpp:802
     // Ignore non-register operands.
     if (!MO.isReg())
       continue;
----------------
LuoYuanke wrote:
> shchenz wrote:
> > Maybe better to exclude the undef case at the very beginning?
> So do we also ingore undef value for physical register?
Do we have undef physical register? I don't see such usage and sounds weird to me, it is a physical register but it is undef....


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  https://reviews.llvm.org/D127848/new/

https://reviews.llvm.org/D127848



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