[PATCH] D127787: [TableGen][X86] Emit memory operand size table
Amir Ayupov via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 14 13:56:10 PDT 2022
Amir created this revision.
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Parse operands and emit corresponding memory access sizes.
Specifically, for each Operand def (e.g. `def i128mem`) check its
`ParserMatchClass` (e.g. `X86Mem128AsmOperand`) and extract `Name` field
(e.g. `Mem128`). Assume that format in extracting the size from the Name.
Note that currently only X86 defines such `ParserMatchClass`'es.
Excerpt from a produced table for X86:
static int getMemOperandSize(int OpType) {
switch (OpType) {
case OpTypes::brtarget16: return 16;
case OpTypes::f128mem: return 128;
case OpTypes::f16mem: return 16;
case OpTypes::f256mem: return 256;
case OpTypes::f32mem: return 32;
case OpTypes::f512mem: return 512;
case OpTypes::f64mem: return 64;
case OpTypes::f80mem: return 80;
case OpTypes::i128mem: return 128;
case OpTypes::i16mem: return 16;
case OpTypes::i256mem: return 256;
case OpTypes::i32mem: return 32;
case OpTypes::i32mem_TC: return 32;
...
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D127787
Files:
llvm/utils/TableGen/InstrInfoEmitter.cpp
Index: llvm/utils/TableGen/InstrInfoEmitter.cpp
===================================================================
--- llvm/utils/TableGen/InstrInfoEmitter.cpp
+++ llvm/utils/TableGen/InstrInfoEmitter.cpp
@@ -22,6 +22,7 @@
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/Support/Casting.h"
+#include "llvm/Support/Regex.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/TableGen/Error.h"
#include "llvm/TableGen/Record.h"
@@ -449,6 +450,31 @@
OS << "} // end namespace " << Namespace << "\n";
OS << "} // end namespace llvm\n";
OS << "#endif // GET_INSTRINFO_OPERAND_TYPE\n\n";
+
+ OS << "#ifdef GET_INSTRINFO_MEM_OPERAND_SIZE\n";
+ OS << "#undef GET_INSTRINFO_MEM_OPERAND_SIZE\n";
+ OS << "namespace llvm {\n";
+ OS << "namespace " << Namespace << " {\n";
+ OS << "LLVM_READONLY\n";
+ OS << "static int getMemOperandSize(int OpType) {\n";
+ OS << " switch (OpType) {\n";
+ Regex MemSizeRegex("Mem([0-9]+)");
+ for (const Record *Op : Operands) {
+ assert(!Op->isValueUnset("ParserMatchClass"));
+ const Record *OperandClassDef = Op->getValueAsDef("ParserMatchClass");
+ // ParserMatchClass Name field, e.g. Mem64
+ StringRef Name = OperandClassDef->getValueAsString("Name");
+ SmallVector<StringRef> Matches;
+ if (!MemSizeRegex.match(Name, &Matches))
+ continue;
+ std::string Size = MemSizeRegex.sub("\\1", Matches[0]);
+ OS << " case OpTypes::" << Op->getName() << ": return " << Size << ";\n";
+ }
+ OS << " default: return 0;\n";
+ OS << " }\n}\n";
+ OS << "} // end namespace " << Namespace << "\n";
+ OS << "} // end namespace llvm\n";
+ OS << "#endif // GET_INSTRINFO_MEM_OPERAND_SIZE\n\n";
}
void InstrInfoEmitter::emitLogicalOperandSizeMappings(
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