[PATCH] D127576: [RISCV] Teach vsetvli insertion to not insert redundant vsetvli right after VLEFF/VLSEGFF.

[Yeting Kuo via Phabricator via llvm-commits]

fakepaper56 marked 3 inline comments as done.
fakepaper56 added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp:327
+  // Update to the VSETVLIInfo right after MI.
+  void updateToEndStatus(const MachineInstr &MI) {
+    if (RISCV::isFaultFirstLoad(MI)) {
----------------
reames wrote:
> This should not be a member function on VSETVLIInfo.  Its part of the data flow transfer rule, not the abstract state.  
Done.


================
Comment at: llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp:943
+
+      if (RISCV::isFaultFirstLoad(*DefMI)) {
+        uint64_t TSFlags = MI.getDesc().TSFlags;
----------------
reames wrote:
> This is a separate optimization, move it to its own review.  
Done. And sorry the code is redundant.


================
Comment at: llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp:1080
+
+    // We need the PHI input to be the output of a VSET(I)VLI/VLEFF/VLSEGFF
+    // and match the predecessor block.
----------------
reames wrote:
> This is a separate optimization, move it to its own review.  
Done.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D127576/new/

https://reviews.llvm.org/D127576