[PATCH] D127642: [RISCV] Fixing undefined physical register issue when subreg liveness tracking enabled.
Kito Cheng via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 13 23:59:44 PDT 2022
kito-cheng updated this revision to Diff 436674.
kito-cheng added a comment.
Changes:
- Address @craig.topper's commet:
- Use `addReg` rather than `add(MachineOperand::CreateReg(...))`.
- Tweak comment in the code.
- Move test case to rvv directory.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D127642/new/
https://reviews.llvm.org/D127642
Files:
llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
llvm/test/CodeGen/RISCV/rvv/undef-subreg-range.mir
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