[llvm] e406252 - [RISCV] Disable matchSplatAsGather for i1 vectors to prevent creating illegal nodes.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 13 13:41:48 PDT 2022
Author: Craig Topper
Date: 2022-06-13T13:41:39-07:00
New Revision: e4062522d33160ffa538bbc6eb8ddf945f534aad
URL: https://github.com/llvm/llvm-project/commit/e4062522d33160ffa538bbc6eb8ddf945f534aad
DIFF: https://github.com/llvm/llvm-project/commit/e4062522d33160ffa538bbc6eb8ddf945f534aad.diff
LOG: [RISCV] Disable matchSplatAsGather for i1 vectors to prevent creating illegal nodes.
We were incorrectly creating a VRGATHER node with i1 vector type. We
could support this by promoting the mask to i8 and truncating it, but
for now I want to prevent the crash.
Fixes PR56007.
Reviewed By: reames
Differential Revision: https://reviews.llvm.org/D127681
Added:
Modified:
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/test/CodeGen/RISCV/rvv/vsplats-i1.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 0d12f33b62c2d..70b0e531fba7c 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -1936,7 +1936,9 @@ static SDValue matchSplatAsGather(SDValue SplatVal, MVT VT, const SDLoc &DL,
return SDValue();
SDValue Vec = SplatVal.getOperand(0);
// Only perform this optimization on vectors of the same size for simplicity.
- if (Vec.getValueType() != VT)
+ // Don't perform this optimization for i1 vectors.
+ // FIXME: Support i1 vectors, maybe by promoting to i8?
+ if (Vec.getValueType() != VT || VT.getVectorElementType() == MVT::i1)
return SDValue();
SDValue Idx = SplatVal.getOperand(1);
// The index must be a legal type.
diff --git a/llvm/test/CodeGen/RISCV/rvv/vsplats-i1.ll b/llvm/test/CodeGen/RISCV/rvv/vsplats-i1.ll
index b8ec72bedf0bb..e96a5db22fd90 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vsplats-i1.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/vsplats-i1.ll
@@ -191,3 +191,24 @@ define <vscale x 16 x i1> @vsplat_nxv16i1_2(i1 %x) {
%splat = shufflevector <vscale x 16 x i1> %head, <vscale x 16 x i1> poison, <vscale x 16 x i32> zeroinitializer
ret <vscale x 16 x i1> %splat
}
+
+define <vscale x 4 x i1> @splat_idx_nxv4i32(<vscale x 4 x i1> %v, i64 %idx) {
+; CHECK-LABEL: splat_idx_nxv4i32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a1, zero, e8, mf2, ta, mu
+; CHECK-NEXT: vmv.v.i v8, 0
+; CHECK-NEXT: vmerge.vim v8, v8, 1, v0
+; CHECK-NEXT: vsetivli zero, 1, e8, mf2, ta, mu
+; CHECK-NEXT: vslidedown.vx v8, v8, a0
+; CHECK-NEXT: vmv.x.s a0, v8
+; CHECK-NEXT: andi a0, a0, 1
+; CHECK-NEXT: vsetvli a1, zero, e8, mf2, ta, mu
+; CHECK-NEXT: vmv.v.x v8, a0
+; CHECK-NEXT: vmsne.vi v0, v8, 0
+; CHECK-NEXT: ret
+ %x = extractelement <vscale x 4 x i1> %v, i64 %idx
+ %ins = insertelement <vscale x 4 x i1> poison, i1 %x, i32 0
+ %splat = shufflevector <vscale x 4 x i1> %ins, <vscale x 4 x i1> poison, <vscale x 4 x i32> zeroinitializer
+ ret <vscale x 4 x i1> %splat
+}
+
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