[PATCH] D127254: [SelectionDAGISel] Chain any mayRaiseFPException instruction created from a strict FP node
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 7 15:12:58 PDT 2022
craig.topper added inline comments.
================
Comment at: llvm/test/CodeGen/PowerPC/fp-strict-conv-f128.ll:625
+; P8-NEXT: fcmpo cr5, f1, f0
+; P8-NEXT: fcmpo cr6, f1, f0
+; P8-NEXT: crand 4*cr7+lt, 4*cr1+eq, lt
----------------
efriedma wrote:
> What's up with the repeated fcmpo instructions? Are the compares repeated in the input, or does your code to ensure CSE not cover this case?
They exist in the input to isel
Originating from type legalization.
```
Expand float operand: t14: i1,ch = strict_fsetccs t0, t5, ConstantFP:ppcf128<APFloat(4746794007248502784)>, setlt:ch
Creating new node: t26: i1,ch = strict_fsetccs t0, t2, ConstantFP:f64<2.147484e+09>, setoeq:ch
Creating new node: t27: i1,ch = strict_fsetccs t26:1, t4, ConstantFP:f64<0.000000e+00>, setlt:ch
Creating new node: t28: i1 = and t26, t27
Creating new node: t30: i1,ch = strict_fsetccs t27:1, t2, ConstantFP:f64<2.147484e+09>, setune:ch
Creating new node: t31: i1,ch = strict_fsetccs t30:1, t2, ConstantFP:f64<2.147484e+09>, setlt:ch
Creating new node: t32: i1 = and t30, t31
Creating new node: t33: i1 = or t32, t2
```
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D127254/new/
https://reviews.llvm.org/D127254
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