[PATCH] D126794: [RISCV] Lower VLEFF/VLSEGFF SDNodes to MachineInstrs with VL outputs.

[Yeting Kuo via Phabricator via llvm-commits]

fakepaper56 added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp:9
 //
 // This file implements a function pass that inserts VSETVLI instructions where
 // needed.
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frasercrmck wrote:
> Should maybe update this comment as this patch feels to me a like a new distinct step that this pass does (other than the recent pre/post passes and optimizations we've added recently and haven't listed here)
You are right. I will add some comment there.


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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td:695
 
+class VPseudoUSLoadFFNoMask<VReg RetClass, int EEW, bit DummyMask = 1> :
+      Pseudo<(outs RetClass:$rd, GPR:$vl),
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reames wrote:
> Unless I'm missing something, the need for separate FF pseudos disappears once you remove the VLOperand flag doesn't it?
The VLOperand you mentioned is HasVLOutput in my code? I think we should still use separate FF pseudos, since the output of VLEFF/VLSEGFF needs two explicit defines.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D126794/new/

https://reviews.llvm.org/D126794