[PATCH] D127080: [DAGCombiner][RISCV] Improve computeKnownBits for (smin X, C) where C is negative.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/test/CodeGen/RISCV/min-max.ll:655
+; ZBB-NEXT:    li a1, -10
+; ZBB-NEXT:    min a0, a0, a1
+; ZBB-NEXT:    ret
----------------
This is the code we get without this patch. That's why I didn't bother with the smin case.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D127080/new/

https://reviews.llvm.org/D127080