[PATCH] D127080: [DAGCombiner][RISCV] Improve computeKnownBits for (smin X, C) where C is negative.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Jun 5 20:39:25 PDT 2022
craig.topper added a comment.
Pre-commit the test?
================
Comment at: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:3713
+ if (!IsMax && CstHigh) {
+ const APInt &ValueHigh = CstHigh->getAPIntValue();
----------------
CstHigh and CstLow might have been swapped on line 368.
================
Comment at: llvm/test/CodeGen/RISCV/min-max.ll:642
+
+define signext i32 @smin_i32_pos_constant(i32 signext %a) {
+; NOZBB-LABEL: smin_i32_pos_constant:
----------------
pos here meant positive. This is a negative constant.
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https://reviews.llvm.org/D127080/new/
https://reviews.llvm.org/D127080
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