[llvm] cfdd2b1 - [InstCombine] Fix tests const value for shl+lshr transforms; NFC

[via llvm-commits]

Author: chenglin.bi
Date: 2022-06-06T10:08:56+08:00
New Revision: cfdd2b1aef19a306f4e489530c5cbccd9bef113e

URL: https://github.com/llvm/llvm-project/commit/cfdd2b1aef19a306f4e489530c5cbccd9bef113e
DIFF: https://github.com/llvm/llvm-project/commit/cfdd2b1aef19a306f4e489530c5cbccd9bef113e.diff

LOG: [InstCombine] Fix tests const value for shl+lshr transforms; NFC

Added: 
    

Modified: 
    llvm/test/Transforms/InstCombine/and.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/InstCombine/and.ll b/llvm/test/Transforms/InstCombine/and.ll
index b9cad04d73ea..3fd81b82e347 100644
--- a/llvm/test/Transforms/InstCombine/and.ll
+++ b/llvm/test/Transforms/InstCombine/and.ll
@@ -1637,26 +1637,26 @@ define i16 @shl_lshr_pow2_const_case1(i16 %x) {
 
 define i16 @shl_lshr_pow2_const_case2(i16 %x) {
 ; CHECK-LABEL: @shl_lshr_pow2_const_case2(
-; CHECK-NEXT:    [[SHL:%.*]] = shl i16 4, [[X:%.*]]
-; CHECK-NEXT:    [[LSHR:%.*]] = lshr i16 [[SHL]], 6
+; CHECK-NEXT:    [[SHL:%.*]] = shl i16 16, [[X:%.*]]
+; CHECK-NEXT:    [[LSHR:%.*]] = lshr exact i16 [[SHL]], 3
 ; CHECK-NEXT:    [[R:%.*]] = or i16 [[LSHR]], -9
 ; CHECK-NEXT:    ret i16 [[R]]
 ;
-  %shl = shl i16 4, %x
-  %lshr = lshr i16 %shl, 6
+  %shl = shl i16 16, %x
+  %lshr = lshr i16 %shl, 3
   %r = or i16 %lshr, 65527 ; ~8
   ret i16 %r
 }
 
 define i13 @shl_lshr_pow2_const_case3(i16 %x) {
 ; CHECK-LABEL: @shl_lshr_pow2_const_case3(
-; CHECK-NEXT:    [[SHL:%.*]] = shl i16 4, [[X:%.*]]
-; CHECK-NEXT:    [[LSHR:%.*]] = lshr i16 [[SHL]], 6
+; CHECK-NEXT:    [[SHL:%.*]] = shl i16 16, [[X:%.*]]
+; CHECK-NEXT:    [[LSHR:%.*]] = lshr exact i16 [[SHL]], 3
 ; CHECK-NEXT:    [[R:%.*]] = trunc i16 [[LSHR]] to i13
 ; CHECK-NEXT:    ret i13 [[R]]
 ;
-  %shl = shl i16 4, %x
-  %lshr = lshr i16 %shl, 6
+  %shl = shl i16 16, %x
+  %lshr = lshr i16 %shl, 3
   %r = trunc i16 %lshr to i13
   ret i13 %r
 }