[PATCH] D126287: [JITLink][ELF/AARCH64] Implement R_AARCH64_ADR_PREL_PG_HI21 and R_AARCH64_ADD_ABS_LO12_NC
Stefan Gränitz via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Jun 5 12:04:45 PDT 2022
sgraenitz accepted this revision.
sgraenitz added a comment.
This revision is now accepted and ready to land.
LGTM, thanks for working on this!
================
Comment at: llvm/test/ExecutionEngine/JITLink/AArch64/ELF_aarch64_relocations.s:49
+ .globl named_data
+ .p2align 4
+ .type named_data, at object
----------------
sunho wrote:
> sgraenitz wrote:
> > The value of p2align varies between test cases. How does it affect the resolution? (Trying other values like 1 or 2 doesn't fail the test.)
> It didn't affect the test result since we don't execute the code (-noexec), but in arm64, function entries need to be aligned to 4 bytes. Although techincally not required, I just added p2align 2 to function entry for the sake of cleaness.
>
> The reason for p2align 4 in named_data is since it might be used to test 128bit/64bit data load/store.
>
Alright, thanks for the explanation.
> The reason for p2align 4 in named_data is since it might be used to test 128bit/64bit data load/store
Yes, I realized that it makes a difference once I found it's used for the LDST relocations from D126630 as well.
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https://reviews.llvm.org/D126287/new/
https://reviews.llvm.org/D126287
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