[PATCH] D126884: [RISCV] Hoist vsetvli with vreg operand out of loops
Philip Reames via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 3 08:09:13 PDT 2022
reames updated this revision to Diff 434032.
reames added a comment.
Fix bug noted by reviewer.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D126884/new/
https://reviews.llvm.org/D126884
Files:
llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
llvm/test/CodeGen/RISCV/rvv/fixed-vector-strided-load-store-asm.ll
llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
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