[PATCH] D126953: Promote bf16 to f32 when the target doesn't support it

[Benjamin Kramer via Phabricator via llvm-commits]

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This is modeled after the half-precision fp support. Two new nodes are
introduced for casting from and to bf16. Since casting from bf16 is a
simple operation I opted to always directly lower it to integer
arithmetic. The other way round is more complicated if you want to
preserve IEEE semantics, so it's handled by a new __truncsfbf2
compiler-rt builtin.

This is of course very bare bones, but sufficient to get a semi-softened
fadd on x86.

Possible future improvements:

- Targets with bf16 conversion instructions can now make fp_to_bf16 legal
- The software conversion to bf16 can be replaced by a trivial implementation under fast math.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D126953

Files:
  compiler-rt/lib/builtins/CMakeLists.txt
  compiler-rt/lib/builtins/fp_trunc.h
  compiler-rt/lib/builtins/truncsfbf2.c
  llvm/include/llvm/CodeGen/ISDOpcodes.h
  llvm/include/llvm/IR/RuntimeLibcalls.def
  llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
  llvm/lib/CodeGen/TargetLoweringBase.cpp
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/test/CodeGen/X86/bfloat.ll

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