[PATCH] D124926: [LoopInterchange] New cost model for loop interchange

Florian Hahn via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Jun 3 01:21:04 PDT 2022


fhahn added a comment.

> interchanged-loop-nest-3.ll, not-interchanged-loop-nest-3.ll, not-interchanged-tightly-nested.ll: the IR was not really entirely correct, since the target triple specified was "x86_64" but the getelementptr indices are 32 bits. The indices should be 64 bits since pointer arithmetric should be 64 bit. So I changed them from i32 to i64, otherwise it will trigger SCEV assertion failures when running loop cache analysis, which says "scev operand types mismatch".

I don't think changing the IR here the right solution to resolving the crash. AFAICT it is perfectly legal to have GEPs with `i32` operands even if the target has 64 bit pointers, they smaller arguments will be sign-extended if  necessary (see `getelementptr` semantics in LangRef, which has `If the offsets have a different width from the pointer, they are sign-extended or truncated to the width of the pointer.`)

LoopCacheAnalysis should not crash on valid IR and needs fixing.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D124926/new/

https://reviews.llvm.org/D124926



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