[llvm] 909a78b - [RISCV] Use MachineRegisterInfo::use_instr_begin instead of use_begin+getParent. NFCI

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2022-06-01T15:37:48-07:00
New Revision: 909a78b3a430f99518a04ae0bced8f0b9ba6e02a

URL: https://github.com/llvm/llvm-project/commit/909a78b3a430f99518a04ae0bced8f0b9ba6e02a
DIFF: https://github.com/llvm/llvm-project/commit/909a78b3a430f99518a04ae0bced8f0b9ba6e02a.diff

LOG: [RISCV] Use MachineRegisterInfo::use_instr_begin instead of use_begin+getParent. NFCI

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp b/llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp
index 0868fd88a6fcc..921f2a95a36bc 100644
--- a/llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp
+++ b/llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp
@@ -95,7 +95,7 @@ bool RISCVMergeBaseOffsetOpt::detectLuiAddiGlobal(MachineInstr &HiLUI,
       !MRI->hasOneUse(HiLUI.getOperand(0).getReg()))
     return false;
   Register HiLuiDestReg = HiLUI.getOperand(0).getReg();
-  LoADDI = MRI->use_begin(HiLuiDestReg)->getParent();
+  LoADDI = &*MRI->use_instr_begin(HiLuiDestReg);
   if (LoADDI->getOpcode() != RISCV::ADDI ||
       LoADDI->getOperand(2).getTargetFlags() != RISCVII::MO_LO ||
       LoADDI->getOperand(2).getType() != MachineOperand::MO_GlobalAddress ||
@@ -197,7 +197,7 @@ bool RISCVMergeBaseOffsetOpt::detectAndFoldOffset(MachineInstr &HiLUI,
   Register DestReg = LoADDI.getOperand(0).getReg();
   assert(MRI->hasOneUse(DestReg) && "expected one use for LoADDI");
   // LoADDI has only one use.
-  MachineInstr &Tail = *MRI->use_begin(DestReg)->getParent();
+  MachineInstr &Tail = *MRI->use_instr_begin(DestReg);
   switch (Tail.getOpcode()) {
   default:
     LLVM_DEBUG(dbgs() << "Don't know how to get offset from this instr:"