[PATCH] D126565: [RegisterClassInfo] Invalidate cached information if ignoreCSRForAllocationOrder changes

[Quentin Colombet via Phabricator via llvm-commits]

qcolombet accepted this revision.
qcolombet added a comment.
This revision is now accepted and ready to land.

Nice catch!

(Note: I've spoken with Srividya offline and unfortunately, no in-tree target could expose the issue, so no test case)


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D126565/new/

https://reviews.llvm.org/D126565