[PATCH] D126809: [ARM64EC 8/?] Implement ARM64EC "thunk" calling conventions

[Eli Friedman via Phabricator via llvm-commits]

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Part of initial Arm64EC patchset.

A key part of Arm64EC is the presence of "thunks"; bits of code that translate between the x64 calling convention, and the ARM64 calling convention.  To lower these, we need to emit calls in a unique way.

This patch adds two calling conventions: one for each side of a thunk. The native side of the thunk just uses the ARM64 calling convention, with the called function stored in x9.  The x64 side uses the x64 calling convention with the registers renamed:

  - RAX -> X8
  - RCX - >X0
  - RDX -> X1
  - RBX -> X27
  - RSP -> SP
  - RBP -> FP
  - RSI -> X25
  - RDI -> X26
  - R8  -> X2
  - R9  -> X3
  - R10 -> X4
  - R11 -> X5
  - R12 -> X19
  - R13 -> X20
  - R14 -> X21
  - R15 -> X22
  - XMMn -> Qn

Putting the complete list here because it isn't part of the documentation yet. It's part of the ABI, though, described in winnt.h.

Note that this doesn't deal with variadic functions; we need to do something a bit different for that.  (I'm currently thinking we won't actually represent the thunks as "variadic"; we don't need to access any arguments via sp, so we can just treat x0-x5 as the arguments.)


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D126809

Files:
  llvm/include/llvm/IR/CallingConv.h
  llvm/lib/Target/AArch64/AArch64CallingConvention.h
  llvm/lib/Target/AArch64/AArch64CallingConvention.td
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

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