[llvm] b4dbcba - [AMDGPU][GFX9][NFC] Rename the base class for SMEM stores.

Ivan Kosarev via llvm-commits llvm-commits at lists.llvm.org
Mon May 30 02:34:03 PDT 2022


Author: Ivan Kosarev
Date: 2022-05-30T10:31:59+01:00
New Revision: b4dbcba3b7b7dbc5b03fd2c349785ce4a6ae6fed

URL: https://github.com/llvm/llvm-project/commit/b4dbcba3b7b7dbc5b03fd2c349785ce4a6ae6fed
DIFF: https://github.com/llvm/llvm-project/commit/b4dbcba3b7b7dbc5b03fd2c349785ce4a6ae6fed.diff

LOG: [AMDGPU][GFX9][NFC] Rename the base class for SMEM stores.

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/SMInstructions.td

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/SMInstructions.td b/llvm/lib/Target/AMDGPU/SMInstructions.td
index a1064e864406..1d74a6be1bdd 100644
--- a/llvm/lib/Target/AMDGPU/SMInstructions.td
+++ b/llvm/lib/Target/AMDGPU/SMInstructions.td
@@ -590,7 +590,7 @@ multiclass SM_Real_Loads_vi<bits<8> op, string ps> {
   }
 }
 
-class SMEM_Real_Store_Probe_vi <bits<8> op, SM_Pseudo ps> : SMEM_Real_vi <op, ps> {
+class SMEM_Real_Store_Base_vi <bits<8> op, SM_Pseudo ps> : SMEM_Real_vi <op, ps> {
   // encoding
   bits<7> sdata;
 
@@ -599,7 +599,7 @@ class SMEM_Real_Store_Probe_vi <bits<8> op, SM_Pseudo ps> : SMEM_Real_vi <op, ps
 }
 
 class SMEM_Real_Store_vi <bits<8> op, string ps, dag offsets>
-    : SMEM_Real_Store_Probe_vi <op, !cast<SM_Pseudo>(ps)> {
+    : SMEM_Real_Store_Base_vi <op, !cast<SM_Pseudo>(ps)> {
   RegisterClass SrcClass = !cast<SM_Store_Pseudo>(ps).SrcClass;
   RegisterClass BaseClass = !cast<SM_Store_Pseudo>(ps).BaseClass;
   let InOperandList = !con((ins SrcClass:$sdata, BaseClass:$sbase),
@@ -623,8 +623,8 @@ multiclass SM_Real_Stores_vi<bits<8> op, string ps> {
 }
 
 multiclass SM_Real_Probe_vi<bits<8> op, string ps> {
-  def _IMM_vi  : SMEM_Real_Store_Probe_vi <op, !cast<SM_Probe_Pseudo>(ps#_IMM)>;
-  def _SGPR_vi : SMEM_Real_Store_Probe_vi <op, !cast<SM_Probe_Pseudo>(ps#_SGPR)>;
+  def _IMM_vi  : SMEM_Real_Store_Base_vi <op, !cast<SM_Probe_Pseudo>(ps#_IMM)>;
+  def _SGPR_vi : SMEM_Real_Store_Base_vi <op, !cast<SM_Probe_Pseudo>(ps#_SGPR)>;
 }
 
 defm S_LOAD_DWORD           : SM_Real_Loads_vi <0x00, "S_LOAD_DWORD">;


        


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