[PATCH] D126576: [RISCV] Add custom isel for (add X, imm) used by load/stores.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun May 29 23:10:44 PDT 2022
craig.topper added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp:703
+ // Try to select ADD + immediate used as memory addresses to
+ // (ADDI (ADD X, Imm-Lo12), Lo12) if it will allow the ADDI to be removed by
+ // doPeepholeLoadStoreADDI.
----------------
StephenFan wrote:
> (ADDI (ADD X, Imm-Hi), Imm-Lo12) ?
That - was meant as subtraction.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D126576/new/
https://reviews.llvm.org/D126576
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