[PATCH] D126576: [RISCV] Add custom isel for (add X, imm) used by load/stores.

[luxufan via Phabricator via llvm-commits]

StephenFan added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp:703
+    // Try to select ADD + immediate used as memory addresses to
+    // (ADDI (ADD X, Imm-Lo12), Lo12) if it will allow the ADDI to be removed by
+    // doPeepholeLoadStoreADDI.
----------------
(ADDI (ADD X, Imm-Hi), Imm-Lo12) ?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D126576/new/

https://reviews.llvm.org/D126576