[PATCH] D126588: [RISCV] isel (add (and X, 0x1FFFFFFFE), Y) as (SH1ADD (SRLI X, 1), Y)
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri May 27 22:48:39 PDT 2022
craig.topper created this revision.
craig.topper added reviewers: reames, asb, luismarques, jrtc27.
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This pattern is what we get after DAG combine for C code like this.
short *ptr1, *ptr2, *ptr3;
unsigned diff = ptr1 - ptr2;
return ptr3[diff];
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D126588
Files:
llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
llvm/test/CodeGen/RISCV/rv64zba.ll
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