[PATCH] D126505: [AArch64][SVE] Don't crash on pre-legalized types in extload combine.
Paul Walker via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu May 26 16:27:21 PDT 2022
paulwalker-arm accepted this revision.
paulwalker-arm added a comment.
This revision is now accepted and ready to land.
Thanks for the fix. I don't mind the test since as you say, the exact output is not relevant.
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:5420
EVT VT, bool OverrideNEON) const {
- if (!VT.isFixedLengthVector())
+ if (!VT.isFixedLengthVector() || !VT.isSimple())
return false;
----------------
I kind of wondered if this should only require the vector element type to be simple but looking at MachineValueType.h the important vector types upto 2048bit are simple so I doubt it matters.
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rG LLVM Github Monorepo
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https://reviews.llvm.org/D126505/new/
https://reviews.llvm.org/D126505
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