[llvm] f50be3d - [TableGen] Remove code beads
via llvm-commits
llvm-commits at lists.llvm.org
Tue May 24 02:40:08 PDT 2022
Author: Sheng
Date: 2022-05-24T17:39:51+08:00
New Revision: f50be3d21808ae113c40a68a9ac6581f203d92d2
URL: https://github.com/llvm/llvm-project/commit/f50be3d21808ae113c40a68a9ac6581f203d92d2
DIFF: https://github.com/llvm/llvm-project/commit/f50be3d21808ae113c40a68a9ac6581f203d92d2.diff
LOG: [TableGen] Remove code beads
Code beads is useless since the only user, M68k, has moved on to
a new encoding/decoding infrastructure.
Added:
Modified:
llvm/lib/Target/M68k/CMakeLists.txt
llvm/utils/TableGen/CMakeLists.txt
llvm/utils/TableGen/TableGen.cpp
llvm/utils/TableGen/TableGenBackends.h
llvm/utils/gn/secondary/llvm/utils/TableGen/BUILD.gn
Removed:
llvm/utils/TableGen/CodeBeadsGen.cpp
################################################################################
diff --git a/llvm/lib/Target/M68k/CMakeLists.txt b/llvm/lib/Target/M68k/CMakeLists.txt
index 5e398217c181c..86f785f301aee 100644
--- a/llvm/lib/Target/M68k/CMakeLists.txt
+++ b/llvm/lib/Target/M68k/CMakeLists.txt
@@ -7,7 +7,6 @@ tablegen(LLVM M68kGenRegisterInfo.inc -gen-register-info)
tablegen(LLVM M68kGenRegisterBank.inc -gen-register-bank)
tablegen(LLVM M68kGenInstrInfo.inc -gen-instr-info)
tablegen(LLVM M68kGenSubtargetInfo.inc -gen-subtarget)
-tablegen(LLVM M68kGenMCCodeBeads.inc -gen-code-beads)
tablegen(LLVM M68kGenMCCodeEmitter.inc -gen-emitter)
tablegen(LLVM M68kGenMCPseudoLowering.inc -gen-pseudo-lowering)
tablegen(LLVM M68kGenDAGISel.inc -gen-dag-isel)
diff --git a/llvm/utils/TableGen/CMakeLists.txt b/llvm/utils/TableGen/CMakeLists.txt
index af77744de4ce5..0974ee8eb244b 100644
--- a/llvm/utils/TableGen/CMakeLists.txt
+++ b/llvm/utils/TableGen/CMakeLists.txt
@@ -8,7 +8,6 @@ add_tablegen(llvm-tblgen LLVM
AsmWriterInst.cpp
Attributes.cpp
CallingConvEmitter.cpp
- CodeBeadsGen.cpp
CodeEmitterGen.cpp
CodeGenDAGPatterns.cpp
CodeGenHwModes.cpp
diff --git a/llvm/utils/TableGen/CodeBeadsGen.cpp b/llvm/utils/TableGen/CodeBeadsGen.cpp
deleted file mode 100644
index 512f3541fa1ff..0000000000000
--- a/llvm/utils/TableGen/CodeBeadsGen.cpp
+++ /dev/null
@@ -1,135 +0,0 @@
-//===---------- CodeBeadsGen.cpp - Code Beads Generator -------------------===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===----------------------------------------------------------------------===//
-// CodeBeads are data fields carrying auxiliary information for instructions.
-//
-// Under the hood it's simply implemented by a `bits` field (with arbitrary
-// length) in each TG instruction description, where this TG backend will
-// generate a helper function to access it.
-//
-// This is especially useful for expressing variable length encoding
-// instructions and complex addressing modes. Since in those cases each
-// instruction is usually associated with large amount of information like
-// addressing mode details used on a specific operand. Instead of retreating to
-// ad-hoc methods to figure out these information when encoding an instruction,
-// CodeBeads provide a clean table for the instruction encoder to lookup.
-//===----------------------------------------------------------------------===//
-
-#include "CodeGenInstruction.h"
-#include "CodeGenTarget.h"
-#include "llvm/ADT/StringExtras.h"
-#include "llvm/TableGen/Error.h"
-#include "llvm/TableGen/Record.h"
-#include "llvm/TableGen/TableGenBackend.h"
-#include <vector>
-using namespace llvm;
-
-namespace {
-
-class CodeBeadsGen {
- RecordKeeper &Records;
-
-public:
- CodeBeadsGen(RecordKeeper &R) : Records(R) {}
- void run(raw_ostream &OS);
-};
-
-void CodeBeadsGen::run(raw_ostream &OS) {
- CodeGenTarget Target(Records);
- std::vector<Record *> Insts = Records.getAllDerivedDefinitions("Instruction");
-
- // For little-endian instruction bit encodings, reverse the bit order
- Target.reverseBitsForLittleEndianEncoding();
-
- ArrayRef<const CodeGenInstruction *> NumberedInstructions =
- Target.getInstructionsByEnumValue();
-
- // Emit function declaration
- OS << "const uint8_t *llvm::" << Target.getInstNamespace();
- OS << "::getMCInstrBeads(unsigned Opcode) {\n";
-
- // First, get the maximum bit length among all beads. And do some
- // simple validation
- unsigned MaxBitLength = 0;
-
- for (const CodeGenInstruction *CGI : NumberedInstructions) {
- Record *R = CGI->TheDef;
- if (!R->getValue("Beads"))
- continue;
-
- BitsInit *BI = R->getValueAsBitsInit("Beads");
- if (!BI->isComplete()) {
- PrintFatalError(R->getLoc(), "Record `" + R->getName() +
- "', bit field 'Beads' is not complete");
- }
-
- MaxBitLength = std::max(MaxBitLength, BI->getNumBits());
- }
-
- // Number of bytes
- unsigned Parts = MaxBitLength / 8;
-
- // Emit instruction base values
- OS << " static const uint8_t InstBits[][" << Parts << "] = {\n";
- for (const CodeGenInstruction *CGI : NumberedInstructions) {
- Record *R = CGI->TheDef;
-
- if (R->getValueAsString("Namespace") == "TargetOpcode" ||
- !R->getValue("Beads")) {
- OS << "\t{ 0x0 },\t// ";
- if (R->getValueAsBit("isPseudo"))
- OS << "(Pseudo) ";
- OS << R->getName() << "\n";
- continue;
- }
-
- BitsInit *BI = R->getValueAsBitsInit("Beads");
-
- // Convert to byte array:
- // [dcba] -> [a][b][c][d]
- OS << "\t{";
- for (unsigned p = 0; p < Parts; ++p) {
- unsigned Right = 8 * p;
- unsigned Left = Right + 8;
-
- uint8_t Value = 0;
- for (unsigned i = Right; i != Left; ++i) {
- unsigned Shift = i % 8;
- if (auto *B = dyn_cast<BitInit>(BI->getBit(i))) {
- Value |= (static_cast<uint8_t>(B->getValue()) << Shift);
- } else {
- PrintFatalError(R->getLoc(), "Record `" + R->getName() +
- "', bit 'Beads[" + Twine(i) +
- "]' is not defined");
- }
- }
-
- if (p)
- OS << ',';
- OS << " 0x";
- OS.write_hex(Value);
- OS << "";
- }
- OS << " }," << '\t' << "// " << R->getName() << "\n";
- }
- OS << "\t{ 0x0 }\n };\n";
-
- // Emit initial function code
- OS << " return InstBits[Opcode];\n"
- << "}\n\n";
-}
-
-} // End anonymous namespace
-
-namespace llvm {
-
-void EmitCodeBeads(RecordKeeper &RK, raw_ostream &OS) {
- emitSourceFileHeader("Machine Code Beads", OS);
- CodeBeadsGen(RK).run(OS);
-}
-
-} // namespace llvm
diff --git a/llvm/utils/TableGen/TableGen.cpp b/llvm/utils/TableGen/TableGen.cpp
index cde49919f54fe..e9279a6426700 100644
--- a/llvm/utils/TableGen/TableGen.cpp
+++ b/llvm/utils/TableGen/TableGen.cpp
@@ -25,7 +25,6 @@ enum ActionType {
NullBackend,
DumpJSON,
GenEmitter,
- GenCodeBeads,
GenRegisterInfo,
GenInstrInfo,
GenInstrDocs,
@@ -82,8 +81,6 @@ cl::opt<ActionType> Action(
clEnumValN(DumpJSON, "dump-json",
"Dump all records as machine-readable JSON"),
clEnumValN(GenEmitter, "gen-emitter", "Generate machine code emitter"),
- clEnumValN(GenCodeBeads, "gen-code-beads",
- "Generate machine code beads"),
clEnumValN(GenRegisterInfo, "gen-register-info",
"Generate registers and register classes info"),
clEnumValN(GenInstrInfo, "gen-instr-info",
@@ -164,9 +161,6 @@ bool LLVMTableGenMain(raw_ostream &OS, RecordKeeper &Records) {
case GenEmitter:
EmitCodeEmitter(Records, OS);
break;
- case GenCodeBeads:
- EmitCodeBeads(Records, OS);
- break;
case GenRegisterInfo:
EmitRegisterInfo(Records, OS);
break;
diff --git a/llvm/utils/TableGen/TableGenBackends.h b/llvm/utils/TableGen/TableGenBackends.h
index 224efa98bae16..c53b71cad5996 100644
--- a/llvm/utils/TableGen/TableGenBackends.h
+++ b/llvm/utils/TableGen/TableGenBackends.h
@@ -67,7 +67,6 @@ void EmitAsmMatcher(RecordKeeper &RK, raw_ostream &OS);
void EmitAsmWriter(RecordKeeper &RK, raw_ostream &OS);
void EmitCallingConv(RecordKeeper &RK, raw_ostream &OS);
void EmitCodeEmitter(RecordKeeper &RK, raw_ostream &OS);
-void EmitCodeBeads(RecordKeeper &RK, raw_ostream &OS);
void EmitDAGISel(RecordKeeper &RK, raw_ostream &OS);
void EmitDFAPacketizer(RecordKeeper &RK, raw_ostream &OS);
void EmitDisassembler(RecordKeeper &RK, raw_ostream &OS);
diff --git a/llvm/utils/gn/secondary/llvm/utils/TableGen/BUILD.gn b/llvm/utils/gn/secondary/llvm/utils/TableGen/BUILD.gn
index 412557df6015f..3ab4abda31971 100644
--- a/llvm/utils/gn/secondary/llvm/utils/TableGen/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/utils/TableGen/BUILD.gn
@@ -12,7 +12,6 @@ executable("llvm-tblgen") {
"Attributes.cpp",
"CTagsEmitter.cpp",
"CallingConvEmitter.cpp",
- "CodeBeadsGen.cpp",
"CodeEmitterGen.cpp",
"CodeGenDAGPatterns.cpp",
"CodeGenHwModes.cpp",
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