[PATCH] D126117: [DAG] SimplifyDemandedBits - ISD::OR - attempt to simplify Op1 again once we have KnownBits from Op0

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon planned changes to this revision.
RKSimon added a comment.

No it doesn't specifically help the UXTB regression that I'm still chasing - it was just one of the things I tried.

I'll leave this on hold for now.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D126117/new/

https://reviews.llvm.org/D126117