[PATCH] D126117: [DAG] SimplifyDemandedBits - ISD::OR - attempt to simplify Op1 again once we have KnownBits from Op0

Sat May 21 11:14:14 PDT 2022

craig.topper added a comment.

Digging back through the history here, it looks like the two test cases here were explicitly broken by D116270 <https://reviews.llvm.org/D116270> which prevented the OR from reassociating the constant to the outer OR.

I'm not necessarily opposed to this patch. I'm just not sure these test changes are the right demonstration of it. Does it help with other cases after the patches you mentioned?

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Comment at: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:1421

+   // Try Op1 again now we have the KnownBits of Op0.
+    APInt DemandedBits1 = ~(Known2.One & DemandedBits0) & DemandedBits;
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Needs to be indented 1 more space

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Comment at: llvm/test/CodeGen/AMDGPU/permute.ll:194

-; FIXME here should have been "v_perm_b32" with 0xffff0500 mask.
 define amdgpu_kernel void @and_or_or_and(i32 addrspace(1)* nocapture %arg, i32 %arg1) {
 ; GCN-LABEL: and_or_or_and:
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This doesn't match what comes out of instcombine, and with the instcombine version we already get v_perm

Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D126117/new/

https://reviews.llvm.org/D126117