[PATCH] D125075: [X86][AMX] Multiple configure for AMX register.
LuoYuanke via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri May 20 19:20:20 PDT 2022
LuoYuanke added inline comments.
================
Comment at: llvm/lib/Target/X86/X86FastPreTileConfig.cpp:407
+ while (!PHIs.empty()) {
+ MachineInstr *MI = PHIs.pop_back_val();
+ VisitedPHIs.clear();
----------------
xiangzhangllvm wrote:
> This reverse the PHI order. Seems dangerous.
> There may be
>
> p0 = PHI A, B
> p1 = PHI p0, C
>
> ```
> A B C
> \ | /
> D
> ```
>
> But I didn't successful created such test case
Good catch. I'll fix it.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D125075/new/
https://reviews.llvm.org/D125075
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