[PATCH] D125075: [X86][AMX] Multiple configure for AMX register.

[Xiang Zhang via Phabricator via llvm-commits]

xiangzhangllvm added inline comments.


================
Comment at: llvm/lib/Target/X86/X86FastPreTileConfig.cpp:46
+class X86FastPreTileConfig : public MachineFunctionPass {
+  // context
+  MachineFunction *MF = nullptr;
----------------
Forget to remove ?


================
Comment at: llvm/lib/Target/X86/X86FastPreTileConfig.cpp:407
+  while (!PHIs.empty()) {
+    MachineInstr *MI = PHIs.pop_back_val();
+    VisitedPHIs.clear();
----------------
This reverse the PHI order. Seems dangerous.
There may be 

p0 = PHI  A,  B
p1  = PHI p0, C

```
A B  C
 \  |  /
    D
```

But I didn't successful created such test case


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D125075/new/

https://reviews.llvm.org/D125075