[PATCH] D126085: [RISCV] Add a subtarget feature to enable unaligned loads

Philip Reames via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri May 20 14:26:25 PDT 2022


reames added a comment.

In D126085#3528394 <https://reviews.llvm.org/D126085#3528394>, @jrtc27 wrote:

> Is this meant to be "it works" or "it works without trapping for emulation"? Pretty much every EEI out there has misaligned accesses guaranteed to work, just not quickly, and in those cases you'd still want to avoid them as the inlined byte-wise code is far faster.

>From what I can tell looking at existing targets, the three states for unaligned are basically.

- "not present" - either the hardware doesn't support, or performance is unreasonable
- "present" - hardware is present, and reasonable performant.  unaligned accesses in source are lowered as such.
- "fast" - hardware is present, optimizer should use when doesn't exist in code already

I tried to follow that convention with this change.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D126085/new/

https://reviews.llvm.org/D126085



More information about the llvm-commits mailing list