[PATCH] D125787: [RISCV] Fix RVV stack frame alignment bugs

[Kito Cheng via Phabricator via llvm-commits]

kito-cheng added inline comments.


================
Comment at: llvm/test/CodeGen/RISCV/rvv/rv32-spill-vector.ll:55
 ; SPILL-O0-NEXT:    csrr a0, vlenb
+; SPILL-O0-NEXT:    slli a0, a0, 1
 ; SPILL-O0-NEXT:    sub sp, sp, a0
----------------
reames wrote:
> Near as I can tell, these shifts are coming from the 16 byte minimum RVV alignment right?  Or is there some other cause I'm missing.
> 
> As noted in the top-level comment, I wonder if this is worthwhile.  
Does it possible to re-align by this way?

```
csrr a0, vlenb
addi a0, a0, 15
andi a0, a0, -16
sub sp, sp, a0
```


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D125787/new/

https://reviews.llvm.org/D125787