[PATCH] D125759: [AMDGPU] Remove isLiteralConstant and isLiteralConstantLike
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue May 17 07:34:58 PDT 2022
arsenm added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:3603-3604
uint8_t OperandType) const {
+ if (MO.isReg())
+ return true;
if (!MO.isImm() ||
----------------
foad wrote:
> arsenm wrote:
> > This doesn't make any sense to me
> Yeah, so this function needs a better name - something that means "is this operand guaranteed not to make the instruction 4 bytes bigger?". I suppose that is (the converse of) what the isLiteralConstantLike name was supposed to imply.
Most of the uses are checking register as is, so could this just assert on registers?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D125759/new/
https://reviews.llvm.org/D125759
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