[PATCH] D125700: [AMDGPU][GFX9] Support base+soffset+offset SMEM loads.
Ivan Kosarev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue May 17 00:06:48 PDT 2022
kosarev added a comment.
In D125700#3517167 <https://reviews.llvm.org/D125700#3517167>, @arsenm wrote:
> I thought we codegened these already? Is this missing a codegen change to use the offsets?
This intentionally misses any codegen changes, yes.
================
Comment at: llvm/lib/Target/AMDGPU/SMInstructions.td:544
+ // documentation suggesting otherwise.
+ // TODO: Ignore soffset_en when disassembling GFX8 instructions.
+ let Inst{14} = !if(ps.has_offset, ps.has_soffset, !if(ps.has_soffset, 0, ?));
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Would love some opinions on how important we think it would be to support that. If I don't miss anything, addressing this would mean either further customising `AMDGPUDisassembler::getInstruction()` or split the TableGen definitions for GFX8 and GFX9 -- and not just the SMEM ones. Which seems to be a significant amount of changes.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D125700/new/
https://reviews.llvm.org/D125700
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