[PATCH] D125564: Teach PeepholeOpt to eliminate redundant copy from constant physreg (e.g VLENB on RISCV)
Philip Reames via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon May 16 16:39:24 PDT 2022
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG7dbf2e7b576f: Teach PeepholeOpt to eliminate redundant copy from constant physreg (e.g VLENB… (authored by reames).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D125564/new/
https://reviews.llvm.org/D125564
Files:
llvm/lib/CodeGen/PeepholeOptimizer.cpp
llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
llvm/test/CodeGen/RISCV/vlenb.ll
Index: llvm/test/CodeGen/RISCV/vlenb.ll
===================================================================
--- llvm/test/CodeGen/RISCV/vlenb.ll
+++ llvm/test/CodeGen/RISCV/vlenb.ll
@@ -16,8 +16,7 @@
; CHECK-LABEL: simple_cse:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: csrr a0, vlenb
-; CHECK-NEXT: csrr a1, vlenb
-; CHECK-NEXT: sub a0, a0, a1
+; CHECK-NEXT: sub a0, a0, a0
; CHECK-NEXT: ret
entry:
%v1 = call i32 @llvm.read_register.i32(metadata !0)
Index: llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
===================================================================
--- llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
+++ llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
@@ -118,7 +118,7 @@
}
bool RISCVRegisterInfo::isConstantPhysReg(MCRegister PhysReg) const {
- return PhysReg == RISCV::X0;
+ return PhysReg == RISCV::X0 || PhysReg == RISCV::VLENB;
}
const uint32_t *RISCVRegisterInfo::getNoPreservedMask() const {
Index: llvm/lib/CodeGen/PeepholeOptimizer.cpp
===================================================================
--- llvm/lib/CodeGen/PeepholeOptimizer.cpp
+++ llvm/lib/CodeGen/PeepholeOptimizer.cpp
@@ -213,8 +213,9 @@
const SmallSet<Register, 2> &TargetReg,
RecurrenceCycle &RC);
- /// If copy instruction \p MI is a virtual register copy, track it in
- /// the set \p CopyMIs. If this virtual register was previously seen as a
+ /// If copy instruction \p MI is a virtual register copy or a copy of a
+ /// constant physical register to a virtual register, track it in the
+ /// set \p CopyMIs. If this virtual register was previously seen as a
/// copy, replace the uses of this copy with the previously seen copy's
/// destination register.
bool foldRedundantCopy(MachineInstr &MI,
@@ -1411,7 +1412,7 @@
Register SrcReg = MI.getOperand(1).getReg();
unsigned SrcSubReg = MI.getOperand(1).getSubReg();
- if (!SrcReg.isVirtual())
+ if (!SrcReg.isVirtual() && !MRI->isConstantPhysReg(SrcReg))
return false;
Register DstReg = MI.getOperand(0).getReg();
@@ -1642,8 +1643,8 @@
// without any intervening re-definition of $physreg.
DenseMap<Register, MachineInstr *> NAPhysToVirtMIs;
- // Set of pairs of virtual registers and their subregs that are copied
- // from.
+ // Set of copies to virtual registers keyed by source register. Never
+ // holds any physreg which requires def tracking.
DenseMap<RegSubRegPair, MachineInstr *> CopySrcMIs;
bool IsLoopHeader = MLI->isLoopHeader(&MBB);
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