[PATCH] D125639: [NVPTX] Enable AtomicExpandPass for NVPTX

Artem Belevich via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon May 16 16:17:13 PDT 2022


tra added inline comments.


================
Comment at: llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp:5160
+    default:
+      return AtomicExpansionKind::CmpXChg;
+    }
----------------
Can we handle types other than 32 and 64-bit? If yes, we need tests at least for some of them (i8/i16/f16/i128). If not, this should probably be `llvm_unreachable()`.


================
Comment at: llvm/test/CodeGen/NVPTX/atomic-expand.ll:1
+; RUN: llc < %s -march=nvptx64 -mcpu=sm_30 | FileCheck %s --check-prefix=CHECK-SM30 --check-prefix=CHECK
+; RUN: llc < %s -march=nvptx64 -mcpu=sm_60 | FileCheck %s --check-prefix=CHECK-SM60 --check-prefix=CHECK
----------------
Nit: You can specify multiple labels as one option `--check-prefixes=A,B,C`

I'd also rename the labels.

`CHECK`->`COMMON` or `ALL` -- makes the intent clear.

`CHECK-SM30` -> `SM30` -- reduces unnecessary clutter and makes it a bit easier to spot the differences between SM30 and SM60.




Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D125639/new/

https://reviews.llvm.org/D125639



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