[PATCH] D125639: [NVPTX] Enable AtomicExpandPass for NVPTX

Mon May 16 11:59:33 PDT 2022

tianshilei1992 added inline comments.

================
Comment at: llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp:5159
+    case 64:
+      return AtomicExpansionKind::None;
+    default:
----------------
tra wrote:
> According to https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#parallel-synchronization-and-communication-instructions-atom
> 
> `64-bit atom.{and,or,xor,min,max} require sm_32 or higher.`
> 
> This must be conditional on the GPU variant we're compiling for, similar to how we handle f64 above.
Thanks for pointing it out. Will do.

I got a question actually. What's the minimum SM version do we currently support? I did find from one of your patch (https://reviews.llvm.org/D24943) that it had the function `hasAtomAddF32`, but now I can't find it. Was it removed because we support a minimum SM version, like SM20?

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D125639/new/

https://reviews.llvm.org/D125639