[PATCH] D125639: [NVPTX] Enable AtomicExpandPass for NVPTX

[Artem Belevich via Phabricator via llvm-commits]

tra added inline comments.


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Comment at: llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp:5159
+    case 64:
+      return AtomicExpansionKind::None;
+    default:
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According to https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#parallel-synchronization-and-communication-instructions-atom

`64-bit atom.{and,or,xor,min,max} require sm_32 or higher.`

This must be conditional on the GPU variant we're compiling for, similar to how we handle f64 above.


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Comment at: llvm/test/CodeGen/NVPTX/atomic-expand.ll.ll:7
+; CHECK-LABEL: foo
+define void @foo(ptr %0, double %1) {
+entry:
----------------
Your code also adds support for atomics on integers, those should be verified, too.

In general we do want to have tests for all types native to PTX.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D125639/new/

https://reviews.llvm.org/D125639