[PATCH] D125643: [ARM SEH 1] [llvm-readobj] Fix printing of Windows ARM unwind opcodes, add tests

Eli Friedman via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon May 16 11:33:36 PDT 2022


efriedma added inline comments.


================
Comment at: llvm/tools/llvm-readobj/ARMWinEHPrinter.cpp:77
   switch (RT) {
   case ARM::WinEH::ReturnType::RT_POP:
     OS << "pop {pc}";
----------------
Is RT_POP simply unused?


================
Comment at: llvm/tools/llvm-readobj/ARMWinEHPrinter.cpp:204
+void Decoder::printRegisters(
+    const std::pair<uint16_t, uint32_t> &RegisterMask) {
   const uint16_t GPRMask = std::get<0>(RegisterMask);
----------------
While you're here, can you split printRegisters() into separate functions PrintGPRRegisters/PrintVFPRegisters?  You've extracted out most of the shared logic anyway.


================
Comment at: llvm/tools/llvm-readobj/ARMWinEHPrinter.cpp:979
+      // prologue, we print this even if EpilogueCount() (aka EpilogueOffset)
+      // is zero.
       ListScope ES(SW, "Epilogue");
----------------
The `isAArch64 || !XData.F()` checks feel weird; even if the "F" bit is set, the prologue still has an effect.  (The AArch64 equivalent is a prologue where the first opcode is end_c.)  I think I'd prefer to just unconditionally print the prologue.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D125643/new/

https://reviews.llvm.org/D125643



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