[PATCH] D125377: [AArch64] Order STP Q's by ascending address

[Andre Vieira via Phabricator via llvm-commits]

avieira added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64MachineScheduler.cpp:18
+
+  if (Cand.isValid()) {
+    MachineInstr *Instr0 = TryCand.SU->getInstr();
----------------
dmgreen wrote:
> Can you add a comment explaining what this is doing and why.
That sounds like a good idea yeah ;) 


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Comment at: llvm/lib/Target/AArch64/AArch64TargetMachine.cpp:488
 
     return nullptr;
   }
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dmgreen wrote:
> Should this either return DAG, or create DAG inside the if.
Ah yeah good catch! Forgot to change that when I moved the DSG creation out of the Fusion check.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D125377/new/

https://reviews.llvm.org/D125377