[llvm] cb22cb2 - [X86] Fix 80 column violation in X86InstrInfo.cpp. NFC

[Mingming Liu via llvm-commits]

Author: Mingming Liu
Date: 2022-05-10T19:56:14-07:00
New Revision: cb22cb2691d0b0d2f7e0183e9049e76dac6e2b9d

URL: https://github.com/llvm/llvm-project/commit/cb22cb2691d0b0d2f7e0183e9049e76dac6e2b9d
DIFF: https://github.com/llvm/llvm-project/commit/cb22cb2691d0b0d2f7e0183e9049e76dac6e2b9d.diff

LOG: [X86] Fix 80 column violation in X86InstrInfo.cpp. NFC

Differential Revision: https://reviews.llvm.org/D125345

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86InstrInfo.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index f4ffb42d9972..831142a66d6b 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -1049,11 +1049,12 @@ static bool findRedundantFlagInstr(MachineInstr &CmpInstr,
     // in the `AND` and `TEST` operation; signed bit is not known for `AND`,
     // and is known to be 0 as a result of `TEST64rr`.
     //
-    // FIXME: As opposed to poisoning the SF bit direclty, consider peeking into
-    // the AND instruction and using the static information to guide peephole optimization if possible.
-    // For example, it's possible to fold a conditional move into a copy
-    // if the relevant EFLAG bits could be deduced from an immediate operand of and operation.
-    // 
+    // FIXME: As opposed to poisoning the SF bit directly, consider peeking into
+    // the AND instruction and using the static information to guide peephole
+    // optimization if possible. For example, it's possible to fold a
+    // conditional move into a copy if the relevant EFLAG bits could be deduced
+    // from an immediate operand of and operation.
+    //
     NoSignFlag = true;
     // ClearsOverflowFlag is true for AND operation (no surprise).
     ClearsOverflowFlag = true;