[PATCH] D125206: [RISCV][SelectionDAG] Support VECREDUCE_ADD mask operation

[WangLian via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG17a8a1bb7126: [RISCV][SelectionDAG] Support VECREDUCE_ADD mask operation (authored by Jimerlife).
Herald added a subscriber: shiva0217.

Changed prior to commit:
  https://reviews.llvm.org/D125206?vs=427980&id=428315#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D125206/new/

https://reviews.llvm.org/D125206

Files:
  llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vreductions-mask.ll
  llvm/test/CodeGen/RISCV/rvv/vreductions-mask.ll

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